For 2009, we're ditching the tried-and-not-so-true "editorial calendar" for a more-practical-in-online-media "editorial topic list." We've found over the years that the industry moves so quickly that a rigid calendar-based system just can't keep up. Instead, we're posting and maintaining a list of topics we're interested in covering. If your company has announcements or information that would support articles on those topics, drop us a line and set up a briefing. We look forward to hearing from you!

IC Design and Verification Journal 2009 Editorial Calendar Key Topics

- SoC Debug (3/09)
- 3D structures (FinFETs etc.) (6/09)
- New process techniques for achieving 32 and 22 nm
- New design techniques for achieving 32 and 22 nm
- Advances in DFM
- Advances in DFT
- New memory structures
- New "other" structures (transistors, caps, whatever)
- New techniques for reducing power
- New tools approaches for optimizing designs (speed/area/power)
- New capabilities in modeling
- New capabilities in ESL-to-silicon
- New approaches to verification
- New approaches to analog design methodologies
- Advances in integration of analog and digital design flows